Semiconductor integrated circuits are provided with doped wells in the substrate surface whereby the various devices comprising the circuit are isolated. Where the circuit includes bipolar devices, the electrical characteristics of these devices are partly determined by the doping of the wells. The wells are conventionally formed by contacting the semiconductor surface with a dopant, or by ion implanting a dopant, followed by a thermal drive in to the required depth. The two techniques produce slightly different profiles, but in both cases the dopant concentration is highest adjacent the surface. Such a dopant distribution is less than ideal for bipolar devices. To reduce collector resistance it is necessary to provide a high dopant concentration, but the associated high concentration at the surface can then lead to breakdown. In most applications therefore, a compromise dopant level must be provided which gives acceptable values for both resistance and breakdown voltage. This of course can be difficult to achieve on a reproducible basis thus leading to a spread of device characteristics. Processes for forming bipolar and field effect transistors are described in our UK specifications Nos. 2,173,638 (U.S. Ser. No. 836,685, filed Mar. 6, 1986) and 2,173,744 (U.S. Ser. No. 831,257) and in our UK patent application No. 8607594 (U.S. Ser. No. 27,870, filed Mar. 19, 1987).
The object of the invention is to minimise or to overcome this disadvantage.